SOURCE: Breker Verification Systems

Breker Verification Systems

June 15, 2017 12:57 ET

Breker Verification Systems to Demonstrate Implementation Compliant with Accellera Portable Stimulus Draft Standard During DAC

Will Showcase its C++ Contribution to Standardization Effort, Displaying Practical Verification Proficiency

SAN JOSE, CA--(Marketwired - June 15, 2017) - Breker Verification Systems, the leading provider of Portable Stimulus, will demonstrate its implementation compliant with the Early Adopter release of the Portable Stimulus Specification from Accellera at the Design Automation Conference (DAC) June 19-21 at the Austin Convention Center in Austin, Texas.

"Breker was doing Portable Stimulus before it had a name," remarks Michael Hoyt, president of Paradigm Works and DVClub organizer. "Breker showed the semiconductor industry what could be done with a graph-based approach to chip design verification through an inspired vision and exceptional tools. The industry owes Adnan Hamid a debt of gratitude as Breker is helping simplify and streamline the verification process."

Breker first introduced a graph-based approach to test case generation in 2008 now known as Portable Stimulus, a standard means of specifying verification intent and behaviors reusable across target platforms. It contributed a working C++ language representation to the Portable Stimulus Working Group (PSWG) for inclusion in the draft standard. As a result, users are working with the eventual standard based on practical and proven verification expertise and years of experience.

As the Portable Stimulus standard moves toward ratification, Breker will continue to be an active member of the PSWG and implement the domain-specific language (DSL) into TrekSoC™ portfolio to be fully compliant with the standard.

In addition to showcasing its implementation compliant with the Early Adopter specification of the Portable Stimulus standard, Breker will demonstrate TrekApps, two new prepackaged applications of Portable Stimulus and its TrekSoC portfolio in DAC Booth #1321.

The ARMv8 TrekApp rigorously tests multicore ARMv8 systems, including stress on the AXI Coherency Extension (ACE) protocol standard; atomic, exclusive and acquire/release memory operations; and system-wide paging with TLBi/DVM. The Power Management TrekApp generates self-checking test cases that exercise all transition sequences in complex power management state machines.

The ARMv8 TrekApp and Power Management TrekApp join Breker's Cache Coherency TrekApp in use within engineering groups building complex cache coherent systems.

Breker in the DAC Program

Adnan Hamid, Breker's chief executive officer, will speak during an EDA, Embedded Systems Track Tutorial titled, "An Introduction to the Accellera Portable Stimulus Standard," Monday from 1:30 p.m. until 3 p.m. He will participate in a DAC Design, EDA Track Session panel titled, "Portable Stimulus and Testbenches -- One Ring to Bind Them," Tuesday, June 20, from 10:30 a.m. until noon. In Advanced Chip Validation Techniques, Paper Session 49 of the Design, EDA Track, Hamid will explain how Accellera's Portable Stimulus was used to verify an LTE switch Wednesday from 1:30 p.m. until 3 p.m.

During the Poster Session on the Exhibit Floor Wednesday from 5 p.m. until 6 p.m., Etienne Caclin, application engineer at Breker, will describe "Using Portable Stimulus to Verify a Low Power SoC Design."

Verification GPS with Breker

Breker gives chip design verification groups true Verification GPS (Graph-based, Portable, Shareable) with its Portable Stimulus solutions. Through the use of a Graph-based intent specification in an industry standard language, TrekSoC offers proven Portability across verification platforms, scaling from IP to SoC for vertical reuse and SoC to post-silicon for horizontal reuse. It is Shareable across global diverse teams, project revisions and communication channels.

TrekSoC is in use at large and mid-sized semiconductor companies worldwide on a variety of projects, including universal verification methodology (UVM) sequence generation from easy-to-author, graph-based representations and hardware/software scenario generation for emulation and system tests. Applications range from servers, networking, graphics processing units (GPUs) and field programmable gate arrays (FPGAs) to mobile and base stations for cellular wireless.

The TrekSoC product portfolio is shipping now. Pricing is available upon request.

About Breker Verification Systems

Breker Verification Systems is the leading provider of Portable Stimulus solutions, a standard means to specify verification intent and behaviors reusable across target platforms, and the first company to introduce graph-based verification. Its Portable Stimulus suite of tools is Graph-based to make complex scenarios comprehensible, Portable, eliminating test redundancy across process, and Shareable to foster communication and reuse giving chip design verification groups true Verification GPS. Breker is privately held.

Engage with Breker at:
Website: www.brekersystems.com
Twitter: @BrekerSystems
LinkedIn: https://www.linkedin.com/company-beta/1010418
Facebook: https://www.facebook.com/BrekerSystems/

TrekSoC, TrekSoC-Si, TrekBox and SoC Scenario Modeling are registered trademark of Breker Verification Systems. Breker Verification Systems acknowledges trademarks or registered trademarks of other organizations for their respective products.

Contact Information

  • For more information, contact:
    Nanette Collins
    Public Relations for Breker Verification Systems
    (617) 437-1822
    Email contact

 
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